This present invention relates generally to the manufacture of printed circuit boards. More particularly this system relates to the measurement and analysis of printed circuit board distortions encountered during production and compensating for such distortions.
The manufacture of printed circuit boards (PCBs) involves a succession of processing steps, some of which convert a circuit design of multiple layers to images, patterns, or circuits that will be transposed to a base material for subsequent processing into electrical interconnections. The design may be directly imposed on a production medium or on a drawing or graphical representation medium. Most usually the design is converted to a digital data representation. Conversion to a digital data representation may be accomplished with commercially available Computer Aided Design (CAD) software. The CAD program, in concert with a computer aided manufacture (CAM) program, translates the design data to a xe2x80x9clayoutxe2x80x9d of a series of items such as circuits, interconnection holes and solder masks to be placed on the base material panel. The layout is usually transposed to a medium called artwork although the layout may also be directly transposed via a laser. The items are referred to as features. Ultimately, sections of the panel will be combined to make a PCB which in many cases are multi-layered.
Features can be applied via a photographic process onto the base material panel using an artwork or directly imaged e.g. laser imaging. During manufacture, dimensional changes of the base material will cause a difference between the anticipated location of a feature and the actual location of that feature. Spacing of a feature is particularly important so as to not short out or interfere with adjacent circuits. Further when the feature is an interconnection hole on a multi-layered circuit board, it is particularly important that these holes be aligned correctly with features in layers above or below. The location of the feature or hole relative to others is known as its xe2x80x9cregistrationxe2x80x9d. If there are misregistrations on the circuit board then subsequent processes such as drilling and further imaging operations may potentially result in misalignments with those further features. In instances of gross misregistration, the resulting product will be out of tolerance and scrapped. Often elements are placed on the panel with special marker information or easily recognizable design so as to easily measure movement that occur in the manufacturing process. These elements will be referred to as xe2x80x9ctargetsxe2x80x9d.
Correction of errors in manufacture has been the subject of much development. For example, U.S. Pat. No. 4,890,239 to Ausschnitt, et al. was issued for a xe2x80x9cLithographic Process Analysis and Control System.xe2x80x9d This system is a system and method for modelling the necessary focus and exposure required when one is imaging features of particular dimensions. The system has ramifications for PCB manufacture, however it does not deal with how to measure the distortion of PCB material and how to correct that distortion.
U.S. Pat. No. 4,799,175 to Sano, et al. was issued for a xe2x80x9cSystem for Inspecting Pattern Defects of Printed Wiring Boards.xe2x80x9d The invention comprises very specific equipment for measuring PCB defects for characterizing the quality of resultant PCBs using targets on the PCB. There is no mention of how to correct for the errors that are present.
U.S. Pat. No. 4,967,381 was issued to Lane, et al. for a xe2x80x9cProcess Control Interface System for Managing Measurement Data.xe2x80x9d This invention is a system for obtaining measurement data for process control and trend analysis purposes. While data can be taken using this invention, the corrective action required is not disclosed.
U.S. Pat. No. 5,206,820 to Ammann, et al. was issued for a xe2x80x9cMetrology System for Analyzing Panel Misregistration in a Panel Manufacturing Process and Providing Appropriate Information for Adjusting Panel Manufacturing Processes.xe2x80x9d This patent describes the process of creating targets known as xe2x80x9cfiducialsxe2x80x9d on a glass master. The targets are placed in the corner of the master and are subsequently measured. Errors are characterized for any particular phase of the manufacturing process and monitored so that the contribution of the various errors can be reduced as much as possible. Targets are not placed throughout the PCB panel and thus might miss certain types of distortion. Further, corrective action is not discussed.
U.S. Pat. No. 5,495,535 to Smilansky, et al. was issued for a xe2x80x9cMethod of Inspecting Articles.xe2x80x9d This system has the goal of inspecting articles and detecting errors for subsequent monitoring of a process which might also include PCB manufacture. The system stores points and compares the stored points to the actual points. Corrective action is not described however.
U.S. Pat. No. 5,519,633 was issued to Chang, et al. for a xe2x80x9cMethod and Apparatus for the Cross-Sectional Design of Multi-Layer Printed Circuit Boards.xe2x80x9d This invention relates to the design and manufacture of circuit boards and does attempt to minimize errors associated with the manufacturing. The tracking of such errors via targets of different types is not discussed.
U.S. Pat. No. 5,497,331 was issued to Iriki, et al. for a xe2x80x9cSemiconductor Integrated Circuit Device Fabrication Method and Its Fabrication Apparatus.xe2x80x9d This invention is designed to enhance the yield of integrated circuit devices. No targets are used during the course of this particular invention or the equipment associated therewith.
U.S. Pat. No. 6,070,004 to Prein was issued for a xe2x80x9cMethod of Maximizing Chip Yield for Semiconductor Wafers.xe2x80x9d Again, this is an invention that relates to integrated circuit design. It is designed to maximize chip yield over an entire wafer. However, there are no targets involved in the process nor is there an attempt to model any systematic errors introduced during the manufacturing process.
U.S. Pat. No. 5,960,185 was issued to Nguyen for a xe2x80x9cMethod and Apparatus for Wafer Disposition Based On Systematic Error Modelling.xe2x80x9d This system relates to integrated circuits and for modelling the errors that are systematic and might be introduced during the course of integrated circuit manufacture. However, this system models various error sources that relate to the positioning of a mask and not to the migration of the material itself. Thus, this patent relates principally to mask alignment and errors based on a known library of errors that can occur with mask alignment. There are no targets involved in the process, nor is material migration dealt with in any fashion.
U.S. Pat. No. 6,030,154 was issued to Whitcomb, et al. for a xe2x80x9cMinimum Error Algorithm/Program.xe2x80x9d This patent relates to multi-layer printed circuit boards and for minimizing the error associated with drilling holes to connect the circuits of one layer with another. The system involves taking x-rays of the various layers and determining the optimum location for drilling between layers. While this process does involve trying to compensate for errors in material movement, there is no attempt to measure the material movement in any systematic way for the purpose of minimizing the errors during subsequent manufacture.
In the manufacture of PCBs, in order to reduce build up of positional errors during manufacture, each process requiring registration of an image to the product must apply compensations to the image positioning of the features to allow for the material movement. Compensations are determined by historical data of compensations required for similar product or by producing a small run of boards to determine the compensations required. To monitor and control the manufacturing processes, measurements are taken of feature and target positions during production. These measurements are compared with the specifications.
As noted above current methods of measurement use targets located in the corners of the panel or artwork and base compensation calculations on the difference in pitch between the measured targets and the required separations or pitch.
Material movement occurs due to changes of temperature, humidity, relaxation of stresses within the materials and stress introduction due to process interactions. The extent of movement varies according to the materials used and the design of the circuitry being manufactured. Printed circuit board manufacture requires numerous processes that will cause changes in temperature and humidity such as thermal curing or chemical treatment. Material movement also occurs when the product is subjected to a mechanical process such as bonding or brushing.
To ensure that the final product meets the customer""s requirements, image compensation is applied to offset dimensional changes that occur. This is done in the form of a stretch or shrink to the data that is used to generate artworks used for inner and outer layer manufacturing. The initial drill program may be also compensated.
Photo tools used for imaging processes are key to maintaining the registration, that is, the relationship of one layer of a multi-layer PCB to another layer. For this reason the pitch between targets is measured on artwork or other image transfer medium to ensure the correct compensations have been applied before the PCB is placed into production.
Once linear distortions and material migration has been accounted for, PCBs are inspected at key points during manufacture to check that the compensations have worked and in cases of prototyping to determine the compensations to apply for volume manufacture.
Current systems use non-contact measuring machines to measure the pitch between targets located in the four corners of the panel and compare these to a nominal value to calculate a compensation value. Initial compensations for new designs are determined based upon similarity of the materials and design to previously manufactured panels.
The problem with this system is that it does not take into account non-linear distortion. The measurement of targets in the corners may indicate the panel/artwork to be dimensionally correct, but in fact a non-linear distortion may have caused features between the corners, that is within the panel, to have moved significantly. Different materials will behave in different ways when put through the same processes and alternative processes will affect the same material in different ways.
As printed circuit designs are moving towards higher densities of smaller features, material distortion and registration accuracy have a more significant effect on final yields. Manufacturers are looking to new materials and methods to give greater control over registration accuracy.
What is therefore required is a system for measuring and characterizing the dimensional stability of different materials and designs and the material movement caused by the PCB manufacturing processes. Such a system would use multiple targets throughout a PCB manufacturing panel to create an index of non-linear material movement. The movement of these targets would then be mathematically modelled so that an inverse of the distortion can be created in the original data that gives rise to the artwork.
It is therefore an objective of the present invention to improve registration capability in the manufacture of multi-layer printed circuit boards.
It is therefore an objective of the present invention to improve registration capability in the manufacture of printed circuit boards.
It is a further objective of this method to characterize the material movement and distortion of both product and related layout caused by the manufacturing processes.
It is still another objective of the present invention to be able to view and characterize the distortions relating to material movement during the PCB manufacturing process.
It is a further objective of the present invention to modify the positioning of features so as to compensate for errors introduced in the production process.
It is a further objective of the present invention to modify the digital representation of the positioning of features so as to compensate for errors introduced in the production process.
It is yet another objective of the present invention to be able to mathematically characterize the distortion relating to material movement in PCB production.
It is still another objective of the present invention to insert targets in the layout design for subsequent transfer to the PCB manufacturing panel to allow distortions to be measured.
It is a further objective of the present invention to insert targets in the layout design for subsequent transfer to the PCB manufacturing panel along periphery of the manufacturing panel to allow distortions to be measured.
It is yet another objective of the present invention to model movement of PCB material during production.
It is still another objective of the present invention to measure material movement that occurs within the bounds of a PCB.
It is a further objective of the present invention to measure the movement of PCB material around the periphery of the PCB.
It is a further objective of the present invention to reduce scrap during PCB manufacture.
It is yet another objective of the present invention to increase the capability of PCB manufacture.
It is still another objective of the present invention to measure the dimensional stability of different materials that are used in the PCB process.
It is a further objective of the present invention to manufacture PCB within narrow tolerances throughout a large piece of multi-layer material.
Using the method of the present invention, targets are added to the CAD/CAM data of each layer of the PCB features on the manufacturing panel. The CAD/CAM, or equivalent tool, inserts easily recognizable targets in the layout of each layer that will produce the PCB manufacturing panel. Targets placement can be around the periphery, across the entire PCB manufacturing panel or both. The targets are inspected using non-contact, non-intrusive video or x-ray co-ordinate measuring machines at any required stage of manufacture to determine the actual position in two dimensions from a predetermined location (a nominated center of origin). Selection of a universal center of origin is arbitrary and may, for example, be the midpoint of two targets.
The actual positions and nominal positions are used to calculate the deviations. In once embodiment a regression analysis is applied to the deviation values to produce, for this embodiment, two polynomial equations determined by best fitting the deviations from nominal of any location upon any of the layers.
Linear compensation values are calculated for a best fit of all points to nominal. A graphical representation of the effects of applying these compensations is generated using the calculated polynomial equation. A model is also generated showing the areas of the panel capable of achieving the required positional registration tolerances with and without application of the calculated compensations.
The best feature to feature positional registration achievable with and without the calculated compensations is determined. Values are generated for overall rotation, offset in two dimensions, coefficients of distortion parallel to the axes of the panel and rhombic distortion.
This method gives both a graphical and numeric interpretation of material movement allowing comparison of different materials. It also allows an understanding of the effects of a manufacturing process upon the PCB material being used. Thus the system and method of the present invention permits new processes to be characterized. Further, the method of the present invention provides real time dimensional analysis to allow re-scaling of tooling to fit product and prevent out of tolerance or scrap product at the earliest possible stage of manufacture. Use of the method described and claimed herein, to modify feature positioning so as to compensate for the modelled non-linear distortions and checking the production results for out of tolerance conditions, ensures that misregistration and scrap are minimized.